K. R. Sanjiv

K. R. Sanjiv is the Chief Technology Officer for Wipro's Global IT Business. The CTO office is responsible for establishing the company's technical vision and strategy and also leading various aspects of the company’s future technology development. It includes incubation of the emerging technologies, creating an eco system for the innovations in these spaces, IP management and creating industry and academic alliances.

Prior to this role, he was Global Head of Analytics & Information Management business unit. He carried P&L responsibility, strategy and operations of this unit globally reporting to CEO. The Analytics & Information Management helped customers derive valuable insights out of integrated information by bringing together the combined expertise of Advanced Analytics, Business Intelligence, Performance Management and Information Management.

Sanjiv has over 25 years of enterprise IT experience, including consulting, application and technology development spanning multiple industry segments and diverse technology areas

Since joining Wipro in 1989, Sanjiv has been involved in defining enterprise architectures for organizations that included technical models, transformation program definitions and governance models. He has designed OLTP mission critical systems such as screen-based trading systems for stock exchanges, surveillance systems and order routing systems for brokerage houses. He has spearheaded due diligence exercises in M&A situations for customers and also managed large project implementations in a global delivery model.

Sanjiv has spoken at leading CxO summits, industry and academic conferences on varied topics related to Business Technology. He holds a bachelor's degree from Birla Institute of Technology and Science, Pilani.

Rober Aitken

Robert C. Aitken is an ARM Fellow and heads ARM’s R&D efforts in advanced silicon technology.
His areas of responsibility include low power design, library architecture for advanced process nodes, and design for manufacturability. His research interests include design for variability, defect analysis, and fault diagnosis. His group has taped out a number of chips, including 4 at or below the 22nm node. He has published over 70 technical papers, on a wide range of topics. Dr. Aitken joined ARM as part of its acquisition of Artisan Components in 2004. Prior to Artisan, he worked at Agilent and HP. He has given tutorials and short courses on several subjects at conferences and universities worldwide. He holds a Ph.D. degree from McGill University in Canada. Dr. Aitken is an IEEE Fellow, and serves on a number of conference and workshop committees.

Professor Anurag Kumar

Professor Anurag Kumar is the current Director of the Indian Institute of Science, Bangalore.

Anurag Kumar is an alumnus of Indian Institute of Technology at Kanpur wherein he obtained his B.Tech. degree in Electrical Engineering in 1977, and was awarded the President of India's Gold Medal. He earned his PhD degree from Cornell University (1981), where he worked under the guidance of Prof. T.L. Fine. He was a Member of Technical Staff at AT&T Bell Labs, Holmdel, N.J., for over 6 years. During this period he worked on the performance analysis of computer systems, communication networks, and manufacturing systems. Since 1988 he has been with the Indian Institute of Science (IISc), Bangalore, in the Department of Electrical Communication Engineering (ECE) as a Professor. From 2000 to 2004 he was the Associate Chair of the ECE Department, from 2004 to 2007 he was the Chair of the ECE Department, and from 2007 to 2014 he was the Chair of Electrical Sciences Division. From 1989 to 2003 he was also the Coordinator at IISc of the nationwide Education and Research Network (ERNET) Project, which established the first country-wide packet communication network in India. He has served as an Area Editor for IEEE Transactions on Networking, and for IEEE Communications Surveys and Tutorials.

He has been elected a Fellow of the IEEE, a Fellow of the Indian National Science Academy (INSA), a Fellow of the Indian Academy of Science(IASc), a Fellow of the Indian National Academy of Engineering (INAE), and a Fellow of The World Academy of Sciences (TWAS). He received the IISc Alumni Award for Excellence in Engineering Research for 2008. He has been awarded the DST J.C. Bose National Fellowship for the period 2011-2016. He is the recipient of the ACCS-CDAC Foundation Award for 2009.

Padma Shri Dr. Manindra Agrawal

Padma Shri Dr. Manindra Agrawal is a Professor of Computer Science at IIT Kanpur. He currently the N Rama Rao Chair in the Department of Computer Science and Engineering. Dr. Agrawal is well known for his path breaking work in designing the first deterministic polynomial-time test for primality of numbers and defining the bounds on the arithmetic complexity of polynomials which is one of the central open problems in complexity theory.

Starting from his doctoral research, Dr. Agrawal was interested in the class of NP-complete sets and the conjecture that all NP-complete sets are polynomial-time isomorphism to each other. He worked on this conjecture and proved it for a large subclass of NP-complete sets. At this time he also got interested in the problem of primality testing. Working with Professor Biswas he designed a new randomized algorithm for the problem and then working with two of his students, in 2002, he designed the first deterministic polynomial-time test for primality. Since then, he is working on the problem of checking if a Polynomial, given as an arithmetic circuit, is non-zero. He has shown that solving this problem in a restricted setting will result in a strong lower bound on the arithmetic complexity of certain polynomials -- one of the central open problems in complexity theory. Professor Agrawal designed private-key encryption algorithms for Indian Navy and Air Force which are used today by the armed forces to secure their communications. He is the recipient of some of the most prestigious awards and recognitions such as the Shanti Swarup Bhatnagar Prize (2003), Meghnad Saha Award (2003), Godel Prize (2006), the Fulkerson Prize (2006), JC Bose fellowship (2007), the first Infosys Prize for Mathematics (2008), Birla Prize (2009), TWAS Prize (2010), Humboldt Prize (2011), and Firodia Award (2011). He is a Fellow of the Indian Academy of Sciences, Bangalore, the National Academy of Sciences (India), Allahabad, and Indian National Academy of Engineering.
Government of India honored him with a Padma Shri in 2013.

Prof. Yadati Narahari

Prof. Yadati Narahari is a Professor and Chairman of the Department of Computer Science and Automation, Indian Institute of Science, Bangalore, India. The focus of his research in the last decade has been to explore problems at the interface of computer science and economics. In particular, he is interested in applications of game theory and mechanism design to design of auctions and electronic markets, and social network research. He has recently completed a textbook entitled Game Theory and Mechanism Design brought out by the IISc Press and the World Scientific Publishing Company. He has been an active scientific collaborator with global R & D companies and research labs including General Motors R & D, IBM Research, Infosys Technologies, Intel, Xerox Research, and Adobe Research Labs. He received the IISc Alumni Award for Research Excellence in Engineering for 2010 at the Indian Institute of Science. He is currently a J.C. Bose
National Fellow. He is a Fellow of the IEEE, INSA, IASc, INAE, and NASI. More details at: http://lcm.csa.iisc.ernet.in/hari/

Dr. Raj Jain

Professor Raj Jain is a Fellow of IEEE, a Fellow of ACM, a Fellow of AAAS, a winner of ACM SIGCOMM Test of Time award, CDAC-ACCS Foundation Award 2009, Hind Rattan Award 2011, and ranks among the top 70 in CiteSeerX's list of Most Cited Authors in Computer Science. Dr. Jain is currently a Professor of Computer Science and Engineering at Washington University in St. Louis. Previously, he was the CTO and one of the Co-founders of Nayna Networks, Inc - a next generation telecommunications systems company in San Jose, CA. He was a Senior Consulting Engineer at Digital Equipment Corporation in Littleton, Mass and then a professor of Computer and Information Sciences at Ohio State University in Columbus, Ohio.

He is the author or editor of 10 books including ``Art of Computer Systems Performance Analysis,'' which won the 1991 ``Best-Advanced How-to Book, Systems'' award from Computer Press Association and "High-Performance TCP/IP: Concepts, Issues, and Solutions," published by Prentice Hall in November 2003. He is a co-editor of "Quality of Service Architectures for Wireless Networks: Performance Metrics and Management," published in April 2010

Prof. Jain has 14 patents, and has written 15 book chapters, 55+ journal and magazine papers and 95+ conference papers. His papers have been widely referenced and he is known for his research on congestion control and avoidance, traffic modeling, performance analysis, and error analysis. Google Scholar lists over 15000+ citations to his publications. He is a co-inventor of the DECbit scheme, which has been implemented in various forms in DECnet, OSI, Frame Relay, and ATM Networks. His team has developed several switch algorithms for explicit rate-based congestion avoidance in ATM networks.

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Dr. V. Kamakoti

V. Kamakoti is a Professor at Department of Computer Science and Engineering, IIT Madras. His areas of interests include Computer Architecture, Secure Systems Engineering and VLSI Design. He completed BE in Computer Science and Engineering from University of Madras followed by MS (By research) and PhD at Department of Computer Science and Engineering, Indian Institute of Technology Madras. Prior to joining his alma mater as a faculty, he completed two post doctoral assignments at Supercomputer Education and Research Center, Indian Institute of Science Bengaluru and Institute of Mathematical Sciences, Chennai.

Dr. Rajat Moona

Dr. Rajat Moona is the current Director General of the Centre for Development of Advanced Computing (C-DAC). C-DAC is the premier R&D organization of the Department of Electronics and Information Technology, for carrying out R&D in IT, Electronics and associated areas.

Prof. Rajat Moona is an alumni of IIT Kanpur and received his PhD degree in Computer Science and Automation from the Indian Institute of Science, Bangalore in 1990. He has been on the faculty of IIT Kanpur since 1991 where he is a full professor in the Department of CSE. In recognition of his research, Prof. Rajat Moona was offered the prestigious Poonam and Prabhu Goel Chair Professorship by IIT Kanpur in 2008.

At IIT Kanpur he had been a recipient of Indo-US Science and Technology Fellowship, a scheme jointly supported by the Governments of India and USA, and had been a visiting scientist to MIT USA in 1994-95 on this fellowship. He had also been a senior Engineering Manager in Mentor Graphics India during 2002-04 where he led a team to develop a tool for embedded system design that is now a product from Mentor Graphics. Besides the numerous courses he has taught at IIT Kanpur, both at undergraduate and postgraduate level, he has also supervised about 80 postgraduate theses. He along with his students and other colleagues, has authored 7 patents, about 30 research papers and 2 books.

His research insterests are in embedded computing, computer security, VLSI design and Operating Systems. He has been involved in defining standards for the Operating Systems for Smart Cards for Indian Government which are in use in applications such as Driving License, Vehicle Registration Systems, Indian National ID, Electronic Passports and several other ID related applications. He has also been instrumental in defining the strategy for smart card certification mechanisms for the Government of India. He along with other faculty members and students have also defined and developed a secure encrypting file system with extremely powerful trust model for use in the enterprise storage technologies. He is involved in defining the RFID applications in areas such as electronic toll collection.

Dr. Rajeev Gopalakrishna

Dr. Rajeev Gopalakrishna is an aspiring entrepreneur hoping to make small dents in big problems. He has 14 years of security R&D experience in industry and academia: 7 years as security architect and strategist in Intel USA and 7 years of PhD research in Computer Science at Purdue University. He is the co-inventor of a hardware-based buffer overflow prevention technology "Memory Protection Extensions (MPX)" in Intel processors, which solves a 40-year old computer security problem.

Nandam Sreenivasa Vithal

Sreenivasa Vithal is currently the Director System Engineering at Ineda Systems. He has over 18 years of experience as an Engineering Product management professional in the field of networking and communications. Over the years he designed and delivered several hardware and software products, right from definition to delivery, working with cross-functional teams, management, executive leadership, business partners and customers. Prior to Ineda systems, Sreeni was the India Operations Head for DeskStream (WorldDesk). He program managed the OS Container based Windows virtualization platform product and took the product to customers for Beta. Prior to this, he worked with Xilinx, Server Engines, Adaptec, Wipro Technologies and Bharat Electronics Limited and built products such as, Network traffic analyzers, Wireless telecom systems, Embedded protocol stack firmware, Microprocessor and FPGA debug software tools and virtualization software.
He filed patents on Sequence Number processing, Time Stamp processing for TCP protocol and zero copy receive mechanism for network protocol acceleration on windows platforms. He made several presentations at national and international forums and won many awards for his presentations. Sreeni likes to network and strongly believes in knowledge sharing and encourages innovative ideas and methodologies.

Mr. PVG Menon

Mr. PVG Menon is the Founder and CEO of VANN Consulting Pvt. Ltd. -- a management consulting firm specializing in the electronics and semiconductor sector. He has experience in semiconductors, embedded systems and computer graphics. He is active in industry forums, and has participated in several path-breaking industry research activities and initiatives.

Mr. Menon recently stepped down as National President of the India Electronics & Semiconductor Association (IESA). During his tenure (2011-’14), there was a fundamental level-shifting of the trade body from a pure networking body, to being a knowledge partner and Advisor to Industry, Government and Academia. Mr. Menon aggressively drove a program to foster innovation and entrepreneurship for the Electronic Systems Design and Manufacturing (ESDM) sector, and was the articulate and assertive face of an “India first” campaign for the Indian ESDM industry. This campaign saw (amongst other achievements) the approval of the setting up of two semiconductor wafer fabs in India and the establishment of technology incubators for both fabless product design as well as electronic systems in India. Top consumption product

Mr. Menon has over 28 years of experience in the Indian IT industry, with rich experience in development, marketing and management of technology. He has worked with leading companies like Philips (later NXP) Semiconductors and Analog Devices - where he has built multi million dollar global businesses. He has also worked with companies like Siemens Information Systems Ltd. and CMC Ltd. in development and project management roles. He has also been part of two start-ups.

Mr. Menon serves on the Governing Council of the National Institute for Electronics & IT (NIELIT) of the Govt of India, and is also a Member of the India Semiconductor manufacturing Advisory Committee (I-SMAC) of SEMI USA.

Mr. Menon has a Master’s Degree in Economics from Madras University and an MBA from the Jamnalal Bajaj Inst. of Management Studies, Bombay.

In 2013, Mr. PVG Menon was conferred with the prestigious Silicon India-Mentor-Graphics Award for Outstanding Leadership for the VLSI/ Embedded Systems Industry in India.